{"id":1466273,"date":"2026-01-18T08:29:46","date_gmt":"2026-01-18T08:29:46","guid":{"rendered":"http:\/\/t8hFxZRZmXJ7WBJL9UB9Y6"},"modified":"2026-01-18T08:29:46","modified_gmt":"2026-01-18T08:29:46","slug":"sk-hynixs-unique-way-of-chopping-cells-in-two-is-a-big-step-in-making-plc-flash-memory-chips-viable-and-could-offer-a-solution-to-ballooning-ssd-prices","status":"publish","type":"post","link":"https:\/\/arcader.org\/news\/sk-hynixs-unique-way-of-chopping-cells-in-two-is-a-big-step-in-making-plc-flash-memory-chips-viable-and-could-offer-a-solution-to-ballooning-ssd-prices\/","title":{"rendered":"SK Hynix’s unique way of chopping cells in two is a big step in making PLC flash memory chips viable and could offer a solution to ballooning SSD prices"},"content":{"rendered":"
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Grab any SSD from a gaming PC<\/a>, and you’ll find that it has one of two types of NAND flash memory chips: TLC or QLC. While the former is faster and more robust, the latter offers considerably more storage, making it ideal for housing terabyte-hungry games. And if SK Hynix’s developments with PLC chips come to fruition, we could see a return to sensible SSD prices.<\/p>\n

PLC or Penta-Level Cell flash chips aren’t a new thing, as Intel, Toshiba, and SK Hynix all started working on their development<\/a> a little over six years ago. Up to now, it doesn’t seem like much progress has been made, but as reported by Blocks and Files<\/a>, it would appear that SK Hynix has perhaps unlocked the key to making them commercially viable.<\/p>\n

Flash memory cells work by using a large voltage to effectively ram electric charge across an insulated gap. Once there, it can remain stored for very long periods of time before requiring a top-up. Single-Level Cell (SLC) works like a switch: it either has all the charge or none, giving you two states or one bit of digital information.<\/p>\n

That only requires the voltage sensors with the flash chips to read one voltage, which is very quick and simple to do. However, because it’s only 1 bit of storage, you need a lot<\/em> of SLCs to get any reasonable-sized memory capacity.<\/p>\n

Which is where the likes of TLC, QLC, and PLC come in. With each of these, more charge states are used in the cell, giving rise to more bits of storage: three for TLC, four for QLC, and so on. However, this also increases the number of different voltages that need to be read, as well as decreasing the gap between them.<\/p>\n

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